1. Field of the Invention
Apparatuses and methods consistent with the present invention relate to a non-volatile memory supporting different cell types, and more particularly, to a mapping apparatus and method for a non-volatile memory supporting different cell types capable of mapping a logical address to a physical address in the non-volatile memory supporting different cell types in which bits represented by unit cells are different from each other.
2. Description of the Related Art
In general, non-volatile memories, serving as storage media for storing and processing data, have come into widespread use in embedded systems, such as electric home appliances, communication apparatuses, and set top boxes.
Flash memories mainly used as the non-volatile memories are non-volatile storage devices capable of electrically deleting data or restoring data, and are suitable for portable apparatuses having a small size since they have lower power consumption than storage media based on a magnetic disk memory and have a high access time like a hard disk.
In the flash memory, from the viewpoint of hardware characteristics, in order to perform a write operation on a memory sector having data written therein, an operation for deleting all blocks including the sector should be performed before the write operation. The erase-before-write operation causes the deterioration of the performance of the flash memory. In order to solve the problem, the concept of a logical address and a physical address has been introduced. That is, a read/write operation on the logical address is changed to a read/write operation on the physical address by various mapping algorithm, and then, the read/write operation is performed. In this case, the logical address is divided into an area for storing metadata that is frequently updated and an area for storing user data that has a larger size than the metadata and is less frequently updated than the metadata.
The flash memories are divided into several types according to the number of bits represented by one cell, from the viewpoint of hardware characteristics. For example, the flash memories are divided into two types, that is, a single level type (SLC) in which one bit is represented by one cell and a multi-level type (MLC) in which a plurality of bits are represented by one cell. The SLC type has a higher-speed read/write performance than the MLC type and also has a larger number of partial programming (NOP) than the MLC type. When the SLC type and the MLC type have the same physical size, the SLC type has a smaller storage capacity than the MLC type.
Since an apparatus having a non-volatile memory being currently produced is composed of only a single cell type, all physical addresses have the same performance and the same physical characteristic. Therefore, when a logical address is mapped to a physical address in a non-volatile memory supporting different cell types, characteristics of the physical address are not considered in each cell type, which results in restrictions in improving the performance of the non-volatile memory.
Japanese Unexamined Patent Application Publication No. 2004-062328 discloses a method of changing a data flow according to the amount of data and the erased state of a physical block in a NAND flash memory having a user physical block and an erase physical block.